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�ץ�åȥե�����̾ | TARGET_ARCH | 11.x ���ݡ��� Tier | 12.x ���ݡ��� Tier | Projected 13.x ���ݡ��� Tier |
64-bit x86 | amd64 | Tier 1 | Tier 1 | Tier 1 |
32-bit x86 | i386 | Tier 1 | Tier 1 | Tier 1 |
PC98 | pc98 | Tier 2 | Tier 4 | Tier 4 |
64-bit ARMv8 | aarch64 | Tier 2 | Tier 2 | Tier 2 |
32-bit ARMv4/5 | arm | Tier 2 | Tier 2 | Tier 4 |
32-bit big-endian ARM | armeb | Tier 2 | Tier 4 | Tier 4 |
32-bit ARMv6 | armv6 | Tier 2 | Tier 2 | Tier 2 |
32-bit ARMv7 | armv7 | *1 | Tier 2 | Tier 2 |
32-bit MIPS soft-float | mips, mipsel | Tier 3 | Tier 2 | Tier 2 |
32-bit MIPS hard-float | mipshf, mipselhf | N/A | Tier 2 | Tier 2 |
32-bit MIPS n32 | mipsn32 | Tier 3 | Tier 2 | Tier 2 |
64-bit MIPS soft-float | mips64, mips64el | Tier 3 | Tier 2 | Tier 2 |
64-bit MIPS hard-float | mips64hf, mips64elhf | N/A | Tier 2 | Tier 2 |
32-bit PowerPC | powerpc | Tier 2 | Tier 2 | Tier 2 |
32-bit PowerPC with SPE | powerpcspe | Tier 2 | Tier 2 | |
64-bit PowerPC | powerpc64 | Tier 2 | Tier 2 | Tier 2 |
64-bit RISC-V | riscv64, riscv64sf | Tier 3 | Tier 2 | |
64-bit SPARCv9 | sparc64 | Tier 2 | Tier 2 | Tier 4 |
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�ץ�åȥե�����̾ | TARGET_ARCH | �ǽ����ݡ��ȥС������ |
Alpha | alpha | 6.4 |
Intel IA-64 | ia64 | 10.4 |